The STM8 core is covering the highest end of performances,

In fact, only the datapath is 8bit. The core is addressing a 32bit memory in linear mode (no paging). The 3 stage pipeline allows the implementation with a low-speed oscillator frequency (16 or 24MHz). It provides the performances with a low noise emission.
The 16 bit registers and the complemented configuration registers are contributing to the robustness of the core and the stability of the code even in a noisy environment .